Sync-n-Scale GPS Card
The figure below shows the architecture of the Sync-n-Scale GPS Card. The synchronization module is effectively a Digital PLL that utilizes application logic driven by the GPS signal as the timing reference to discipline a local oscillator and provide an accurate frequency and timing reference. All digital logic is implemented in an FPGA and supported by additional analog circuitry including Digital to Analog Converter, temperature sensor and power supplies. The module has an on-board GPS receiver that receives the signal and supplies power to an active antenna. The GPS timing reference is continuously monitored for their presence, frequency and phase. The GPS card provides synchronized output frequencies of 62.5 MHz and 1 Pulse Per Second (PPS) test digital waveforms traceable to the GPS signal in the formats and accuracies specified elsewhere in this document. The GPS card also provides the current Coordinated Universal Time (UTC) time value received from GPS frame data in the format specified through high-speed serial transceivers to optional Expansion cards.
The OS driver manages the installation of up to two GPS Cards per computer platform. Automatic switchover in the event of a loss of one of two GPS Card time sources provides redundant OS time updates to the platform. The driver creates entries into the Windows Event Logs, which provide real-time detailed operational status for one or both cards.
Usually this mode is entered upon start-up of the card. The unit is unlocked to GPS reference signal and the card is not supplying any Operating System clock updates through the PCI Express slot, nor is any information sent to the Expansion Cards. This mode can be entered following re-acquisition of the GPS signal during holdover mode. This mode is exited when frequency lock of the OCXO is achieved to the GPS signal, and all needed system time information is available from the GPS as well. The card may be in this mode for several minutes, depending on the GPS message frame cycle.
The output of the module is phase locked to the GPS signal in this mode, and the card is supplying operating system time updates to the host system. In addition, card time and frequency data is available on the expansion port. Loss of the GPS signal causes this mode to be exited, either to holdover mode—if there is sufficient operating history available—or back to Acquisition mode.
In holdover mode the module has lost GPS timing and external reference inputs and is utilizing stored timing data, called history, to control the output frequency. Holdover mode is typically used while the GPS signal is temporarily disrupted causing no valid GPS reference to be available. The GPS card in this mode provides timing based on data from the history buffer, while unlocked to the GPS reference signal. The history data is compiled while the device is locked to the GPS signal. Although the GPS card uses an adaptive algorithm to compensate for oscillator drift, the stability of the output signal in holdover mode depends primarily on the stability of on-board oscillator and environmental (temperature) effects. The GPS card continues to update the host-system operating system clock in holdover mode, and provides timing information to any available downstream expansion cards. Holdover mode is exited when a valid GPS signal becomes available, or the holdover period times-out, in which alarm mode is entered.
Alarm mode is entered when the holdover mode has expired. This mode is exited when a valid GPS signal becomes available in which case the Acquiring mode is entered.
Local Reference Oscillator
The GPS Card uses an NEL 62.5MHz Oven Controlled Crystal Oscillator (OCXO) as the on-board disciplined oscillator/frequency reference during holdover.
The uses a UBLOX GPS receiver with a high accuracy 1 PPS output used as input to the DPLL OCXO disciplining algorithm. The GPS receiver is configured to provide the most accurate timing signal and is continuously monitored by the FPGA logic.
The GPS card provides outputs to the PCI express 1X card edge connector, and to the bulkhead RJ45 connector for expansion cards. There is a 1 PPS test signal available on the card with a 50% duty cycle. All output signals are aligned within a few nanoseconds.
High Speed Serial Transceivers
The GPS card uses Xilinx GTP Gigabit Transceivers running at 1.25 GHz line rate derived from the clock traceable to the 62.5MHz OCXO. The transceivers send time information to the optional expansion cards connected to the RJ-45 slot. Information is sent is response to time requests from downstream cards. The time information is in the form of a packet containing elapsed seconds from the POSIX time epoch.
The GPS card has detailed Built-In Self Test monitoring and LED indications of operational modes of the card. It is not expected that these LEDs will be always visible, or even operational in future versions of the card. Real time Windows Event Logs entries provide detailed operational status.